Ph.D. Candidate · UT Austin

Vishal
Kumar Meena.

Engineer. Researcher. Builder.

Space propulsion to intelligent power conversion.

UT Austin — Where I build, learn, and explore.

Vishal sitting on a motorcycle in front of the UT Austin Littlefield Fountain

A few chapters along the way

Select a milestone to explore — one click, same page.

2022–Present

Ph.D. Candidate · UT Austin

Research in power electronics, high-density power conversion and GaN/SiC systems.

Timeline illustrations are visual markers, not photographs of the actual projects. Supporting papers and project links open the original sources.

Education

University of Texas at Austin [Department]Aug 2022 – Present

PhD in Electrical and Computer Engineering

Indian Institute of Technology Delhi [University]July. 2014 – May 2018

B.Tech in Electrical Engineering, Specialization in Embedded systems and VLSI

Work Experience [Original projects]

Graduate Research AssistantDr. Alex Huang’s SPEC group, UT Austin (2022-present) [Research group]
  • Microinverters — Designed a 1.6 kW GaN-based resonant PV micro-inverter (Buck–Boost + 1MHz LLC unfolder) achieving ηpeak = 99% & 98% and 2× higher power density than commercial benchmarks (Team of two).
    [Figure]
    Resonant PV micro-inverter — system schematic or prototype image (placeholder — image not yet provided)
  • Developed a 1.6 kW, 0.5 MHz GaN/SiC bidirectional LLC DCX (80–480 V) with optimized 3D planar-Litz flexible PCB windings to reduce copper and fringing losses, achieving ηFL = 97.1% (validated by FEA and hardware).
    [Figure]
    GaN/SiC bidirectional LLC DCX — hardware or winding image (placeholder — image not yet provided)
  • Developed a 4-port transformerless micro-inverter using a cascaded FSBB architecture optimized for high-FOM GaN; achieved 4× density, 98.1% efficiency; hardware-validated independent MPPT and PR grid current control.
    [Figure]
    Four-port transformerless micro-inverter — stacked FSBB prototype (placeholder — image not yet provided)
  • Extended source-mismatch range via segmented-sine modulation and step injection, reducing clipping.
  • Developed a source-loss-tolerant dual-input TLBB microinverter for PV–battery–grid integration.
  • SST —Developing a GaN-assisted sub-ns adaptive gate driver for a 10-kV SiC module, controlling di/dt & dv/dt to reduce switching loss and voltage overshoot, in collaboration with National Lab of the Rockies.
    [Figure]
    Adaptive gate driver — test setup or circuit illustration (placeholder — image not yet provided)
  • Leading development of HVDC-side series-stacked SiC switching and control using 3.3-kV and 10-kV devices for a $4M ARPA-E 30-kV/1-MW DC–DC SST, enabling scalable HVDC/UHVDC conversion. [ARPA-E project]
    [Figure]
    30-kV SST — power stage block diagram (placeholder — image not yet provided)
  • AI/ML —Developing simulation-trained, hardware-refined digital twins with physics-informed reinforcement learning for autonomous interleaving optimization of decentralized heterogeneous converters. [Interactive Ripple study]
    [Figure]
    AI / digital twins — system architecture (placeholder — image not yet provided)
  • Developing single-sensor predictive MPPT for cascaded µ-inverters with fast tracking and diagnostics. [Interactive MPPT study]
  • TA: Designed a semester-long PMIC project on a V2 peak-controlled buck converter with PWM/PFM hopping, OCP, MOS segmentation, and forced-DCM; mentored students through full Cadence implementation.
    [Figure]
    PMIC course — Cadence implementation screenshot (placeholder — image not yet provided)
Scientist/Engineer - SDIndian Space Research Organisation (2018-22) [ISRO]
  • Responsible for design, realization, qualification of Discharge Power Supply for All Electric Propulsion System
  • Successfully ignited the 300mN Stationary Plasma Thruster for the first time in India (Team of 3 members.)
    [Figure]
    Electric propulsion — thruster test photograph (placeholder — image not yet provided)
  • Achieved world-class efficiency for Discharge Supply by employing PSFB ZVZCS topology (engineering model). (η achieved = 93% (peak-96%), NASA’s Lunar Gateway PPU = 95% )
  • Invented a novel voltage-scalable ZVZCS topology and designed a modular discharge supply for high-Isp, wide-throttle-range 200 kW-class nested-channel Hall thrusters targeting future Mars cargo missions. [Linked file]
    [Figure]
    200-kW Hall-thruster supply — power architecture (placeholder — image not yet provided)
  • Analyzed harness/filter effects on breathing-mode oscillations to address thruster quenching.

Patent & Publications [Original publication page]

  • V. K. Meena et al., “High-Density Cascaded FSBB GaN Micro-Inverter,” IEEE TPEC, 2026. [Paper]
  • V. K. Meena and A. Q. Huang, “Split-Sine Modulated GaN Micro-Inverter,” IEEE PVSC, 2026.
  • M. Heydari, V. K. Meena et al., “1.6 kW GaN PV Microinverter with Two MPPT Ports,” IEEE ECCE, 2023. [Paper]
  • Invented and patented a voltage-scalable ZVZCS converter (Patent No. 440340) and built modular discharge hardware for next-generation 200-kW Hall-thruster propulsion for Mars cargo missions. [Linked file]

Projects

  • Proposed and analyzed hybrid liquid metal–water cooling for Ga2O3 devices operating at 100–400 °C. [Linked file]
  • Deep Learning: Fine-tuned Inception V3 for image captioning; implemented CNNs and LSTMs [Certificate]
  • CMOS ToF Image Sensor for LiDAR – B.Tech Thesis: Designed a successive-approximation TDC architecture and layout with a novel, PVT-insensitive sub-clock delay cell using path swapping and DLL. [Thesis file]
    [Figure]
    CMOS ToF sensor — TDC architecture diagram (placeholder — image not yet provided)

Skills & Interests

Technical: PLECS, MATLAB, SPICE, Cadence Virtuoso, Altium, Inventor, ANSYS Maxwell/Icepak/Q3D, Vivado/Libero, CCS | Python, C/C++, VHDL/Verilog | FPGA, DSP | PyTorch, TensorFlow/Keras, Git

Interests: Toastmasters, Football, UTA Archery Club, Motorbike enthusiast, Bibliophile